GATE CS Question Paper 2000

GATE CS Question Paper 2000GATE CS Question Paper 2000.

GATE CS Computer Science Question Paper 2000 Answers Solution Free Download PDF 2000

GATE i.e. Graduate Aptitude Test in Engineering Computer Science 2000 Exam Has been Conducted by IISc Bangalore IIT Bombay IIT Delhi IIT Guwahati IIT Kanpur IIT Kharagpur IIT Madras IIT Roorkee. This GATE CS 2000 examination is the procedure to get the admission in M.Tech

GATE Computer Science i.e. CS Question Paper, This GATE CS 2000 Question will help all the students for their exam preparation, here the question type is MCQ i.e multiple choice question answers, if this GATE CS 2000 question paper in pdf file for GATE CS you can download it in FRCS, if GATE Computer Science 2000 paper in text for GATE CS you can download GATE CS 2000 page also just Go to menu bar, Click on File->then Save.

GATE CS Question Paper 2000

GATE CS 2000 Question paper Free Download PDF is available in which has been provided by many students this GATE Computer Science 2000 paper is available for all the students in FRCS and also GATE CS 2000 question paper fully solved i.e with answer keys and solution.

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 1.1 The minimum number of cards to be dealt from an arbitrarily shuffled deck of 52 cards to guarantee that three cards are from some same suit is
(a) 3 (b) 8 Cc) 9 (d) 12

 1.5 Let L denotes the language generated by the grammar S 4 OSO/OO. Which of the following is true?
(a) L = (b) L is regular but not 0
(c) L is context free but not regular (d) L is not context free

1.6 The number 43 in 2’s complement representation is
(a) 01010101 (b) 11010101 (c) 00101011 (d) 10101011

1.7 To put the 8085 microprocessor in the wait state
(a) lower the HOLD input (b) lower the READY input
(c) raise the HOLD input (d) raise the READY input

1.9 The 8085 microprocessor responds to the present of an interrupt 
(a) as soon as the TRAP pin becomes ‘high’
(b) by checking the TRAP pin for ‘high’ status at the end of each instruction each
(c) by checking the TRAP pin for ‘high’ status at the end of the execution of each instruction.
(d) by checking the TRAP pin for ‘high’ status at regular intervals.

1.10 The most appropriate matching for the following pairs
X: Indirect addressing 1: Loops
V: Immediate addressing 2: Pointers
Z: Auto decrement addressing 3. Constants
(a)X—3 Y—2 Z-1 (b)X—1 V—3 Z-2
(c)X—2 Y—3 Z-1 (d)X—3 V–1 Z-2

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